System having semiconductor die mounted in die-receiving area having different shape than die

ABSTRACT

Electronic systems utilizing a plurality of integrated circuit packages having at least some large gaps between edges of a semiconductor die and the inner ends of package conductors defining a die-receiving area, one or more bond wire support structure are disposed in the gap, thereby causing a long bond wire to behave as two or more shorter bond wires. The bond wires are tacked to a top surface of the support structure by various alternative means. Alternatively, a &#34;jumper&#34; structure having conductive traces of graduated length can be disposed in the die-receiving area between the die and the edges of the die-receiving area, providing an intermediate connection between the die and the leads of the package, thereby permitting short bond wires to be used in lieu of long bond wires.

CROSS REFERENCE TO RELATED PATENT APPLICATION

This patent application is a continuation-in-part of commonly owned U.S. patent application Ser. No. 08/412,597, filed Mar. 27, 1995 which is a continuation of U.S. patent application Ser. No. 08/079,301, filed Jun. 18, 1993, now abandoned, the parent application entitled "TECHNIQUES FOR MOUNTING SEMICONDUCTOR DIES IN DIE-RECEIVING AREAS HAVING A SHAPE DIFFERING FROM THAT OF THE DIE" by Michael D. Rostoker, and is incorporated by reference herein.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to electronic systems having at least one integrated circuit package, and more particularly to an electronic system utilizing at least one integrated circuit package that forms electrical connections with a semiconductor die.

2. Description of the Related Technology

Electronic systems utilizing integrated circuits have revolutionized the way modern society works and lives by making possible a level of technological sophistication unknown in the days of vacuum tubes and even discrete transistors. These electronic systems, which are building blocks for ever larger and more complex systems such as machines used in manufacture, transportation and the like. The sophistication of these electronic systems is the result of the complex functions handled by semiconductor devices, such as integrated circuits, which make up the electronic system. An integrated circuit may comprise, on a small silicon chip, many thousand or even a million or more transistors, including associated diodes, resistors and capacitors, interconnected together to form complex electronic functions. The integrated circuit chip or "die" is packaged in an encapsulating package having leads or "pins" for connecting the integrated circuit functions to the overall electronic system or product incorporating a plurality of integrated circuits.

Trends in modern integrated circuitry are generally towards smaller size (miniaturization) and greater function (increased circuit density). Generally, greater functionality indicates an required increase in input/output (1/O) connections (e.g., bond pads) on the die. As integrated circuit devices become smaller and their function increases, the need arises for improved methods of forming large numbers of connections between an integrated circuit die and its package. Traditional techniques for connecting (e.g., a lead frame, or the like) to a semiconductor die include wire bonding and tape-automated bonding. Generally, both of these techniques are relatively large in scale as compared with the bond pads on the die, and are not shrinking significantly. Hence, generally, techniques for connecting to a semiconductor die are not keeping pace with integrated circuit miniaturization.

The number of external interface (e.g., I/O) signals on integrated circuit dies has increased steadily to a point where it is not uncommon to find 200 or more "pins" (i.e., I/O connections) on modern integrated circuits, particularly on very large-scale integrated circuits such as high-end microprocessors. Miniaturization demands that these increasing number of connections be formed in ever-smaller areas.

Another trend in modern integrated circuits has been toward providing larger numbers of external interface (I/O) signals for a given amount of circuitry. While decreasing semiconductor device geometries (increasing circuit densities) have accommodated demands for greater amounts of circuitry in a given semiconductor die area, I/O signals are generally limited in number by the space along the periphery (edges) of the die. This is because "bond pads" to which external I/O signal connections are made, are typically placed along the edges of the die. While some attempts have been made to utilize portions of the interior area of the die for bond pads, problems associated with long bond wire runs and bond wires crossing over other bond wires tend to render these approaches cumbersome and impractical.

Co-pending commonly owned U.S. patent application Ser. No. 07/916,328 filed Jul. 17, 1992 by Rostoker, (hereinafter ROS1) describes a technique whereby greater numbers of bond pads per unit of semiconductor die area can be achieved by making use of "certain non-square" die shapes such as triangle shapes, trapezoidal shapes, greatly elongated rectangular shapes, parallelogram shapes, etc. Compared to low-aspect ratio rectangular shaped or square semiconductor dies, these certain non-square die shapes exhibit an inherently greater ratio of edge length to surface area, permitting more bond pads to be placed in the peripheral area of the die (Oust inside the edges thereof) per unit of die area.

Conventional integrated circuit packages commonly have a square or low-aspect ratio rectangular "die-receiving area". The die-receiving area, into which a semiconductor die is mounted, is generally defined as the area described (contained within) the inner ends of conductive lead fingers (or conductive traces) of the package (or leadframe).

The conductive traces (e.g., lead fingers) of a semiconductor package extend outward from the die-receiving area, ultimately ending at and providing electrical connection to the external leads, pins or the like of the semiconductor package. In some cases, the conductive traces of the package radiate (fan) outward from the die-receiving area, being most closely packed where they are closest to the die. The physical constraints on trace size and pitch (spacing) clearly limit how many traces can fit adjacent to the die-receiving area. It is known, that by terminating some or all of the traces at a distance from the die-receiving area, the number of traces can be increased. However, when connecting a bond wire between the die and the trace, the lengths involved can quickly become unacceptable.

Copending, commonly-owned U.S. patent application Ser. No. 07/933,430 filed Aug. 21, 1992 by Rostoker (hereinafter ROS2) describes semiconductor packages with "certain non-square" die-receiving areas to accommodate certain non-square die shapes, such as those described in ROS1. ROS2 provides for highly optimal mounting and connection arrangements for certain non-square dies which are particularly well suited to mounting non-square dies by matching the shape of the die-receiving area, as defined by the inner ends of the conductive traces, to the (certain non-square) shape of the die.

Irrespective of the type of package (e.g., conventional or ROS2-type packages) and style of die mounting, the semiconductor die must be connected to inner ends of the conductive lead fingers in the package. One well-known way to effect this connection is by using bond wires attached at one end to bond pads on the die, and attached at their other end to the inner ends of the lead fingers. Bond wires are on the order of one thousandth of an inch, or less, in diameter. Bond pads are on the order of a few thousandths of an inch, spaced from one another on the order of one thousandth of an inch. Evidently, when many bond wires are connected to a die, this is a very crowded situation, and there is the possibility of these bond wires shorting against one another, breaking, and other related problems. This problem is exacerbated in plastic molded packaging, wherein a die is mounted to a lead frame, wire bonded thereto, inserted into a mold, and covered with plastic. The influx of plastic into the mold can cause movement of the closely-spaced bond wires, resulting in a defective packaged component. Coming this late in the process (during packaging), defects due to bond failure are generally irreversible and expensive. Semiconductor die shape notwithstanding, the trend in microelectronics towards smaller, denser semiconductor dies with more input/output (I/O) connections causes increased difficulty in packaging such dies, especially in plastic packages, due to lead frame and bonding limitations.

There is a tremendous hesitancy in the semiconductor industry to use "non-standard" packages or packaging equipment, largely due to issues of tooling, capital equipment cost and training. In other words, the familiar is favored over the unfamiliar. This means that, at least in the short-term, the industry could find it advantageous to package the "certain non-square" dies of ROS1 in conventional packages, rather than in the non-conventional packages of ROS2. Unfortunately, the shape mismatch between the "certain non-square" dies of ROS1 and the die-receiving areas of conventional packages inevitably creates situations where some "bond wires" between bond pads on the (certain non-square) semiconductor die and the die-receiving area of the package are "unacceptably" long. Such bond wires become "unacceptably" long when there is a significant danger of shorting between adjacent bond wires.

Having overly long bond wires can cause other problems besides shorting together. For example, bond wires, as mentioned hereinabove, are extremely fine wires of about 0.001 inches in diameter. At extended lengths (e.g., twice "normal"), such bond wires can exhibit sufficient resistance to cause voltage drops when carrying current. Further, the increased resistance exhibited by long bond wires can interact with parasitic capacitances in the die and/or the package to cause RC (resistive-capacitive) delays, thereby slowing the operation of the packaged die. Inconsistent wire lengths can also contribute to signal "skewing" due to differential signal delay times experienced by one lead of the package vis-a-vis other leads.

OBJECTS OF THE INVENTION

It is therefore an object of the present invention to provide an electronic system having at least one integrated circuit package utilizing an improved technique for packaging semiconductor dies.

It is another object of the present invention to provide an electronic system utilizing a technique for adapting a semiconductor die having one shape (for example, certain non-square) to a die-receiving area having a substantially different shape (e.g., square or rectangular).

It is a further object of the present invention to alleviate problems associated with long lengths of bond wires in an electronic system, for example, as necessitated by a shape mismatch between a die and a die-receiving area in a package of the system.

It is a further object of the present invention to prevent shorting between adjacent long bond wires in an electronic system.

SUMMARY OF THE INVENTION

The above and other objects of the present invention are satisfied, at least in part, by providing an electronic system that has at least one integrated circuit package having a shape mismatch between a semiconductor die and a die-receiving area defined by inner ends of conductive traces (e.g., leadframe leads) in an integrated circuit package results in gaps (distances) of varying (typically graduated) size between sides (edges) of the die and sides (boundaries) of the die-receiving area. A lead support structure is provided between the die and the inner ends of the conductive lead fingers of the conductive leads of the package. Intermediate portions of long bond wires are bonded, or tacked, to an upper surface of the lead support structure. In this manner, long bond wires are supported along their length and are mechanically constrained from flopping around and contacting (e.g., shorting to) one another.

According to an aspect of the invention, the support structure may be placed approximately midway between the ie and the inner ends of the conductive package traces. In this manner, a single long bond wire will "behave" as two shorter bond wires.

According to another aspect of the invention, two-or-more support structures may be placed between the edge of the die and the inner ends of the conductive package traces. In this manner, a single long bond wire will "behave" as three-or-more shorter bond wires.

One or more lead support structures are provided for each die. In one embodiment of the integrated circuit package of the system, a plurality of line-segment-like lead support structures are provided--for example, only where needed for restraining relatively long bond wires. In another embodiment, a single ring-like support structure is provided and is disposed entirely around the periphery of the die (between the die and the inner ends of the conductive traces).

In one embodiment of the invention, the upper surface of the (one or more) lead support structure(s) is provided with bond pads, to which the long bond wires are tacked at a point along their length. Unlike traditional bonding (e.g., of a bond wire to a die), the long bond wire is not cut in this process. It is still a single long bond wire which has been tacked down, preferably using conventional wire bonding techniques, to the upper surface of the lead support structure(s).

In another embodiment of the integrated circuit package of the invention, the (one or more) lead support structure(s) is be formed of an insulating material, and the long bond wires are tacked thereto with a suitable adhesive.

Alternatively, the long bond wires can be "tacked" to a top surface of a plastic lead support structure by ultrasonic bonding.

Alternatively, the lead support structure can be provided with a plurality of notches on its upper surface, each notch retaining and locating the intermediate portion of a respective bond wire.

For very long bond wire runs, one or more additional (auxiliary) lead support structures can be provided to attach the very long bond wires at additional points along their length, thereby further supporting and mechanically constraining them.

In another embodiment of the integrated circuit package used in the system of the invention, a "jumper" comprising conductive traces of graduated length corresponding to the graduated gap between sides of the die and sides of the die-receiving area can be disposed, between the die and the inner ends of the package conductive traces, in the die receiving area. A first set of bond wires is connected from inner ends of the package conductive traces (e.g., lead fingers) to outer ends (towards the lead fingers) of corresponding jumper conductive traces. A second set of bond wires is, in turn, connected from the inner ends (towards the die) of the jumper conductive traces to correspond bond wire attachment points (e.g., bond pads) on the die.

According to a feature of the invention, conductive traces may be formed to exhibit significantly lower resistance than a comparable length of bond wire, thereby minimizing wiring resistances in the package.

According to a feature of the invention, the lengths of the jumper conductive traces can be graduated so that the total bond wire length for connecting a package trace to a bond pad can be maintained relatively constant for all signal connections.

According to a feature of the invention, longer jumper conductive traces can be formed with a larger cross-section (either wider or thicker, or both) than shorter jumper conductive traces so that the effective resistance between inner ends of package conductive traces and die bond pads can be maintained relatively constant for all signal connections. In other words, the width and/or thickness of the jumper conductive traces can be established to provide a relatively constant resistance regardless of trace length, thereby providing substantially matched wiring resistance for each signal so connected.

It is contemplated that the present invention may utilize system level products comprising single chip modules (SCM) often including other electrical components (such as capacitors, resistors, inductors, etc.); multi-chip modules (MCM) having at least two integrated circuit dice in the same or separate ceramic, resin, or substrate board packages, with or without other electrical components; board level products (BLP) such as those having multiple integrated circuits on printed wiring board(s) (PWB); and box level products (Boxes) which may include a combination of elements from the list of SCM, MCM, BLP and the like. One or more of such SCM, MCM, PWB or BLP's may act as, or be integrated into a functional system or subsystem. The system level products contemplated include digital (or other) data storage systems; security and surveillance systems , general purpose computers (such as personal computers, work stations, servers, mini computers, mainframe computers and super computers); digital audio and video compression and transmission systems; transportation vehicles (such as airplanes, trains, automobiles, helicopters, rockets, missiles, boats, submarines, and the like); subsystems utilized in such vehicles (such as navigational positioning, i.e., Global Positioning System (GPS), navigational displays and controllers, hazard avoidance such as radar and sonar, fly by wire control, and digital engine control and monitoring); entertainment systems (such as digital television and radio, digital cameras, audio and video recorders, compact disc players, digital tape, or the like); and communications systems (such as PBX, telephone switching, voice mail, auto attendant, network controllers, video teleconferencing, digital data transmission (such as token ring, ethernet, ATM, or the like), and including subsystems or subassemblies for inclusion or attachment to more complex system level products.

Other and further objects, features and advantages will be apparent from the following description of a presently preferred embodiment of the invention, given for the purpose of disclosure and taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a top view of a "certain non-square" semiconductor die disposed within a rectangular die-receiving area formed by inner ends of package conductive traces (e.g., leads, fingers) surrounding (and defining) the die-receiving area;

FIG. 2 is top view of a portion of a die-receiving area incorporating a lead support structure;

FIG. 3 is a top view of a portion of a die-receiving area incorporating a compound lead support structure;

FIG. 4 is a view of a portion of a die-receiving area incorporating a "jumper" with graduated-length intermediate conductors (jumper conductive traces);

FIG. 5 is a top view, of a greatly-elongated rectangular semiconductor die mounted in a substantially snare die-receiving area incorporating lead support structures;

FIG. 6 is a top view of a die-receiving area showing a technique for mounting and connecting to two greatly-elongated rectangular dies;

FIG. 7 is a view of a portion of a semiconductor device package showing a one-piece lead support structure;

FIG. 8 is a perspective view of another embodiment of a one-piece lead support structure;

FIG. 9a is a close-up perspective view of a portion of a "comb-type" lead support structure;

FIG. 9b is a close-up perspective view of a portion of a "flat-top" lead support structure;

FIG. 9c is a do-up perspective view of a portion of a "bond-pad type" lead support structure;

FIG. 10 is a schematic elevational view of a single chip module illustrated in cross section;

FIG. 11 is a schematic top view of a multi-chip module;

FIG. 12 is a schematic top view of a board level product;

FIG. 13 is a schematic to t box level product;

FIG. 14 is a schematic block diagram of a computer system;

FIG. 15 is a schematic block diagram of an entertainment system;

FIG. 16 is a schematic block diagram of an information and entertainment transmission system;

FIG. 17 is a schematic block diagram of a security and surveillance system;

FIG. 18 is a schematic block diagram of a plurality of transportation systems; and

FIG. 19 is a schematic block diagram of a plurality of communications and information transmission systems.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention is an electronic system having semiconductor integrated circuit packages with unique die and die-receiving shapes were a support structure may effectively facilitates a more robust bond wire structure. Referring now to the drawings, the details of preferred embodiments are schematically illustrated. Like elements in the drawings will be represented by like numbers, and similar elements will be represented by like numbers with a different lower case letter suffix.

FIG. 1 shows a "certain non-square" die 106 (triangular, in this case, but illustrative of the general case of ROS1-type dies) mounted in a substantially square, rectangular die-receiving area 102 of a semiconductor device package 100. Inner ends 104 of conductive lead fingers (package traces) extend inward towards the die receiving area, ending at the periphery of the die receiving area.

In a case, such as is shown in FIG. 1, where there is a significant mismatch between the shape of the semiconductor die (e.g., 106) and the shape of the die-receiving area, it is evident that the lengths of bond wires (110) will vary widely, from short-to-long, and that some of the bond wires will be unacceptably long. In the least, it is a reasonable goal to attempt to minimize the lengths of as many bond wires as possible. This can be accomplished in part, as shown in FIG. 1, by aligning at least one of the sides (e.g., 106a) of the die 106 with at least one side (e.g., 102a) of the die-receiving area 102. By doing this, bond wires (e.g., 112b) between conductors 104 and the die 106 along the aligned sides (e.g., 106a and 102a) of the die 106 and die-receiving area 102 are kept relatively short and relatively consistent in length. If, in addition, the die 106 is centered vertically (as depicted) within the die-receiving area 102, then some benefit (i.e., short bond wires) can be realized for connections to the die opposite the aligned side (e.g., 106a). This is illustrated in FIG. 1 by bond wire 112a connected to the point of the triangular shape of the die 106 (opposite the aligned side 106a).

Inevitably, with such a shape mismatch, at least one side of the die 106 (e.g., 106b) will not be in alignment with the nearest side (e.g., 102b) of the die-receiving area 102. This means that at least some of the bond wires (e.g., 110) connected to the die 106 along the misaligned side (e.g., 106b) will be significantly longer than others. When many long bond wires are adjacent to one another, numerous problems such as those described hereinabove (e.g., shorting, signal delays, etc.) can result.

FIG. 2 illustrates an approach to solving the problems associated with excessively long bond wires. In this case a lead support structure 116 is disposed in the die-receiving area 102 of the package 100. The lead support structure 116 is positioned between the misaligned sides 106b and 102b of the die 106 and die-receiving area 102, respectively, at an angle between that of the side 102b of the die-receiving area 102, respectively, at an die 106, such that it is roughly half-way between the side 106b of the die 106 and the side 102b of the die-receiving area 102, as measured along the path of bond wire connections therebetween.

A representative single bond wire 114 comprising two portions 114a and 114b is connected between the die 106 and a conductive lead (not shown) of the package. At a point 114c along its length, the bond wire 114 is attached to the lead support structure 116, dividing it into two portions 114a and 114b on either side of the attachment point 114c. By securing the bond wire 114 to the lead support structure 116 at a point 114c along its length, the bond wire 114 is mechanically constrained such that it cannot short to adjacent bond wires. Details of methods of attaching bond wires (e.g., 114) to support-structures (e.g., 116) are discussed in greater detail hereinbelow with respect to FIGS. 9a-c.

This technique of disposing a support structure only where needed (i.e., only for the too long bond wires) can be applied to any shape die in any shape die-receiving area on any or all sides of the die.

FIG. 3 shows a similar (to FIG. 2) arrangement using a compound lead support structure 120 comprising two parts 120a and 120b. Towards the top (as depicted) of the gap between the misaligned sides 106b and 102b of the die and the die receiving area, respectively, the gap is widest. This means that bond wires across the widest portions of the gap are longer than bond wires across narrower portions of the gap (e.g., towards the bottom, as depicted). If a lead support arrangement such as that (116) shown in FIG. 2 were used, some bond wires, particularly towards the top of the gap, would be unsupported over relatively greater distances than others. For cases where this presents a problem that cannot be solved by a single support segment (e.g., 116), the compound support structure 120 (120a and 120b) permits very long bond wires, e.g., 118 (composed of portions 118a, 118b, and 118c) to be attached at more than one point to provide effective mechanical support and constraint of the very long bond wires. The goal is that each portion of the bond wire be within limits defined for an acceptable length of a bond wire.

The lead support structure 120 comprises first and second parts 120a and 120b, each similar to the lead support structure shown and described as 116 with respect to FIG. 2. The first part 120a is shorter than the second part 120b, and is positioned towards the top (widest part) of the gap between the misaligned sides 102b and 106b. The second support structure 120b is longer and extends through a greater portion of the gap.

A bond wire 118 (118a, 118b, and 118c), located near the top end of the gap between the misaligned sides 102b and 106b of the die and the die-receiving area is connected between the die 106 and a conductive lead (not shown, assumed) at the side 102b of the die-receiving area 102. At a first point 118d along its length, the bond wire 118 is secured to a first part 120a of the compound lead support structure 120. At a second point 118e along its length, the bond wire 118 is attached to the second part 120b of the compound lead support structure 120. The two attachment points 118d and 118e divide the bond wire 118 into three roughly equal length portions 118a, 118b and 118c, and provide mechanical support and constraint for the bond wire 118. While there are three portions to the bond wire 118, it is nevertheless a single bond wire requiring electrical connection (wire bonding) at only its two ends. The bond wire is merely "tacked" to the support structure.

Other bond wires located lower (as depicted) in the gap between the misaligned sides 102b and 106b of the die and the die-receiving area are relatively shorter and can accommodate attachment to only one lead support structure, in a manner similar to that shown in FIG. 2. This is shown in FIG. 3 with respect to a second bond wire 119 (119a and 119b) between the die 106 and a conductive lead (not shown, assumed) along the side 102b of the die-receiving area 102. The second bond wire 119 is shorter than the first bond wire 118, by virtue of its location in a narrower portion of the gap between the misaligned sides 102b and 106b. As such, it does not need as much mechanical support as the first bond wire 118. At one point 119c along its length, the bond wire 119 is attached to the second part 120b of the compound lead support structure 120, dividing it into two roughly equal length portions (segments) 119a and 119b. The second part 120b of the lead support structure 120, by extending lower into the gap than the first part 120a, provides attachment points (e.g., 119c) and mechanical support for bond wires (e.g., 119) which are long enough to require mechanical constraint, but which are not long enough to require constraint at two points. Other bond wires (not shown) located even lower in the gap (out of the view of FIG. 3) may be short enough not to require any mechanical support at all. As was the case with the support structure of FIG. 2, particulars of tacking the bond wires to the support structure(s) are shown in FIGS. 9a-9c.

While the lead support structures described hereinabove with respect to FIGS. 2 and 3 are directed to supporting bond wires at a point (or points) along their length, without "breaking" the single bond wire, an alternative approach involves using a "jumper" having graduated-length conductive traces.

FIG. 4 shows an alternative method of adapting the "certain non-square" ROS1-type die 106 to the square or low aspect ratio rectangular die-receiving area 102. In FIG. 4, a jumper structure 122 having four conductive traces 124a, 124b, 124c, and 124d is disposed in the die-receiving area between the misaligned sides 102b and 106b of the die-receiving area 102 and die 106, respectively.

A first connection is made between conductive traces of the package (not shown) and the jumper 122 by means of a bond wire 126a connected to a conductive lead (not shown) along the side 102b of the die-receiving area and to one end of a first conductive trace 124a of the jumper. The other end of the first conductive trace 124a is connected to the die 106 by means of a second bond wire 128a. This differs significantly from the embodiments of FIGS. 2 and 3 in that two (essentially in series) bond wires are required to make a single connection to the die.

In like manner, a second connection is made between the package and the die 106 by means of a bond wire 126b connected to another conductive lead (not shown) along the side 102b of the die-receiving area and to one end of a second conductive trace 124b of the jumper structure 122. The other end of the second conductive trace 124b is connected to the die 106 by means of another bond wire 120b.

In like manner a third connection is made between the package and the die by means of a bond wire 126c connected to another conductive lead (not shown) along the side 102b of the die-receiving area and to one end of a third conductive trace 124c of the jumper structure 122. The other end of the third conductive trace 124c is connected to the die 106 by means of another bond wire 128d.

In like manner, a fourth connection is made between the package and the die by means of a bond wire 126d connected to another conductive lead (not shown) along the side 102b of the die-receiving area and to one end of a fourth conductive trace 124d of the jumper structure 122. The other end of the fourth conductive trace 124d is connected to the die 106 by means of another bond wire 128d.

It will be observed that each of the first through fourth exemplary connection paths, from the package to the die, is shorter than the preceding connection. This is amply evident in the illustration of FIG. 4. This can be used to great advantage in electronic systems that utilize the packaging of semiconductor dies that mismatch the die-receiving areas into which they are disposed.

The length of each conductive trace (124a-d) is preferably established so that the total (of the two for each connection to the die) bond wire length for all connection paths is approximately the same. As shown in FIG. 4, the conductive traces of the jumper structure are sized so that the bond wire segments for each j connection to the die is the same.

Since conductive traces (and leads) can have resistance per-unit-length which can be (and typically is) lower than that of the relatively thin bond wires, this connection technique (i.e., of FIG. 4) has the effect of lowering the overall connection resistance to the die (thereby reducing delays). Further, it is possible to establish the thickness (height) or width of the conductive traces (124a-d) in accordance with their length to keep their resistances (cross-section times length) approximately equal to one another (i.e., longer jumper traces would be thicker or wider). This has the benefit of providing substantially matched overall resistances from the package to the die for each signal on the die which is connected in this manner, thereby helping to match signal delays due to parasitic capacitances and reducing signal skewing.

The jumper structure 122 can be a discrete structure which is disposed (such as by an adhesive) in the die-receiving area.

In the embodiments of FIGS. 2-4, described hereinabove, and in the embodiments that follow, only a few of many bond wires are shown, for illustrative clarity. The general goal of using certain non-square dies to increase the 1/O count for dies of a given area, would make it impractical to illustrate the hundreds of connections that the present invention facilitates.

As mentioned hereinabove, a principal goal of the present invention is to "adapt" conventional (e.g., square die-receiving areas) packages to non-conventional (e.g., certain non-square) dies. This would allow integrated circuit device manufacturers to employ certain-non-square dies without re-tooling their device packages.

The invention has great utility in any case where there is a mismatch between the shape of the die and the shape of the die-receiving area, whether or not certain non-square dies are being disposed in square die-receiving areas, and is also of use in any case where a portion or all of the bond wire lengths are unacceptably long.

FIG. 5 shows an arrangement 200 wherein a greatly-elongated rectangular die 206 is disposed in a substantially square die-receiving area 202. The die 206 is disposed in a substantially centered position in the die-receiving area 202, such that bond wire connections, e.g., 216, to the top and bottom edges (as depicted) of the die 206 are short enough not to require mechanical support. Bond wires, e.g., 214, connected to the left and right sides (as depicted) of the die 206, however, are quite long, and require mechanical support to prevent shorting with adjacent bond wires (not shown). To this end, lead support structures 216a and 216b (similar to 116) are disposed roughly in the center of the gaps on the left and right sides (as depicted), respectively, of the die 206, between the die 206 and the edges of the die-receiving area 202. A representative long bond wire 214 is shown forming a connection to the left side (as depicted) of the die 206. The bond wire 214 is attached (tacked, in a manner described hereinbelow) at a point 214a along its length to the lead support structure 216a, thereby providing mechanical support and constraint for the bond wire 214 and preventing shorting to any adjacent bond wires (not shown).

It will readily be appreciated by one of ordinary skill in the art, that although the lead support scheme shown in FIG. 5 is similar to that shown and described with respect to FIG. 2, the techniques described with respect to FIGS. 3 and 4 may also be applied to this situation.

FIG. 6 shows an alternative arrangement 200a whereby substantial advantage is taken of the shape of the generally square die-receiving area 202 to accommodate two greatly elongated rectangular dies 206a and 206b. It is assumed that the design (and functionality) of the dies 206a and 206b is such that inter-die connections 222 are arranged along adjacent sides of the dies 206a and 206b. The dies 206a and 206b are positioned sufficiently close to one another that no mechanical support is required for the inter-die connections 222. In a manner similar to that shown in FIG. 5, the dies 206a and 206b are disposed in a substantially centered vertical (as depicted) position in the die-receiving area 202, permitting unsupported bond wire connections (e.g., 217a and 217b) to the top and bottom (as depicted) edges of the dies 206a and 206b. First and second lead support structures 220a and 220b are provided to the left (as depicted) of die 206a and to the right (as depicted) of die 206b, respectively, in the die-receiving area 202 between the dies (206a, 206b) and the right and left sides (as depicted) of the die-receiving area 202. A representative bond wire 218, connected to the left (as depicted) die 206a is supported (attached) at a point 218a along its length by first lead support structure 216a. Another representative bond wire 219, connected to the right (as depicted) die 206b is supported (attached) at a point 219a along its length by the second lead support structure.

As with FIG. 5, it will be readily appreciated by one of ordinary skill in the art, that although the lead support scheme shown in FIG. 6 is similar to that shown and described with respect to FIG. 2, the techniques for shortening "effective" bond wire length described with respect to FIGS. 3 and 4 may also be applied in this situation.

FIG. 7 shows a portion of an integrated circuit package 300 wherein a "certain non-square" ROS1-type die 306 is disposed within a substantially square die-receiving area 302, with one side (the bottom side, as depicted) of the die 306 aligned with one side (also the bottom side, as depicted) of the die-receiving area, such that bond wires, e.g., 312b, between the aligned sides are sufficiently short that no supplementary mechanical support is required. A one-piece lead support structure 316 is disposed in the die receiving area 302 around the die 306. The lead support structure includes two support legs 316a and 316b connected by a cross member 316c. Generally, whereas the FIG. 2 embodiment generally contemplated using a number of distinct support structures in various areas around the die where bond wire lengths are (by definition) too long, in this embodiment a single support structure "embraces" two areas around the die where bond wire lengths are (by definition) too long.

A representative bond wire 310 is shown connected to the die 306 and supported (attached) approximately midway along its length by one of the support legs 316a. A bond wire 312a connected (tacked) to the top (as depicted) of the die 306, is sufficiently short that no mechanical constraint is required, and the bond wire 312a need not be attached to the cross-member 316c. This embodiment has the advantage that if there are two "distinct" areas where bond wires need to be tacked to a support, one support structure can be disposed around (or partially around) the die to subsume the critical areas.

It is within the spirit and scope of the present invention that any of the support structures described hereinabove be provided in the form of a single-piece unit. For example, the compound lead support structure shown and described with respect to FIG. 3 can be readily adapted to a single-piece structure extending around more than one side of a semiconductor die simply by providing one or more cross-members to connect the various parts of the compound lead support structure.

Alternatively, a single-piece lead support structure can be provided in the form of a ring-like structure disposed completely around a semiconductor die. Such a structure is shown and described with respect to FIG. 8. A ring-like lead-support structure 400 is formed in a shape designed to surround a semiconductor die. Bond wires, of which 420 is representative, are affixed to the top surface 410 of the lead-support structure 400, by any suitable method. Again, this embodiment has the advantage that if there are several areas where bond wires need to be tacked to a support, one support structure can be disposed around the die to subsume the critical areas. Additionally, by using a complete ring-like support structure, the support structure is readily disposed symmetrically about the die. (In contrast, if three individual support structures were disposed about the periphery of a triangular die, each would have to be accurately positioned, individually).

Having described various forms and configurations of lead-support structures for adapting conventional packages with square or near-square die-receiving areas to "certain non-square" ROS1 type dies, attention is now directed to various techniques for affixing bond wires to lead support structures as next described with respect to FIGS. 9a-9c. The techniques for tacking a bond wire to a support structure shown in FIGS. 9a-9c are applicable to all but the FIG. 4 embodiments described hereinabove. In each case, a long bond wire, electrically bonded at its two ends (to package traces and to the die) is tacked to a support structure, so that it behaves as two (or more) shorter bond wires, without breaking the bond wire or necessitating additional electrical bonds.

FIG. 9a shows a broken away portion of a lead-support structure 500a. In this case, the upper surface of the support means is provided with a plurality of grooves (notches) 510, at least one per bond wire, for locating and retaining intermediate portions of the bond wires, of which the bond wire 520 is representative. To this end, the grooves 510 are wide enough and deep enough to form a slight interference fit with the bond wire 520, i.e., on the order of one thousandth of an inch (or less, depending on the diameter of the bond wire). In this manner, the bond wires are directly mechanically supported (tacked to the support structure). Given that the die to which the bond wires are connected is ultimately encapsulated in plastic (for molded plastic packages), or covered with a glob top epoxy (for tape-based packages), the plastic (or epoxy) will further fix the bond wires (e.g., 520) into the notches 510.

FIG. 9b shows another approach to affixing (tacking) the bond wire 520 to a different type of lead support structure 500b. However, in this case, the lead support structure 500b is formed of a plastic material, such as nylon, with a substantially flat (un-grooved) top surface. The bond wire 520 is bonded at a point 530 to the lead support structure 500b in any suitable manner, such as by ultrasonic bonding to the upper surface of the lead support structure 500b. This is indicated by the tip 535 of an ultrasonic bonding tool positioned above the bond wire 520. Alternatively, a dollop of adhesive (not shown) may also be used to tack the bond wire 520 to the upper surface of the lead support structure 500b.

Another approach to tacking the bond wire 520 uses still another type of lead support structure 500c, as shown in FIG. 9c. A number of metallic pads 540, at least one per bond wire, are disposed on the top surface of the lead support structure 500c. These bond pads 540 may be similar to the bond pads on the die (not shown), in that they may simply be solder areas. In this manner, an intermediate portion of the bond wire 520 can be tacked to the lead support structure 500c using similar techniques as are employed for bonding the ends of the bond wire to the die and lead fingers (not shown), respectively. This technique has the advantage that the same apparatus which is used to connect the bond wire 520 to the die and lead fingers can be used to attach the bond wire 520 to the lead support structure 500c, thereby saving complexity, tool changes, and time.

For any of the lead-support structures described hereinabove with respect to FIGS. 2, 3, 5, 6, 7, and 8, the bond wire attachments may be accomplished using any of the attachment techniques described hereinabove with respect to FIGS. 9a-9c.

It will be readily appreciated by one of ordinary skill in the art that the techniques described hereinabove, while described for "certain non-square" dies assembled in square or low-aspect ratio rectangular die-receiving areas, are equally suited to assemblies of a die of any shape to a die-receiving area having a substantially different shape from that of the die.

Many other combinations of features, some of which have been expressly set forth hereinabove, are within the spirit and scope of this invention and may be advantageously utilized in SCM, MCM, and BLP systems as contemplated herein.

System level products may be designed and fabricated in various forms. A system level product may, for example, include a single chip modules ("SCM") having a single semiconductor die in a single package body, with or without other electrical components, such as capacitors. System level products may also include multi-chip modules ("MCM") having two or more semiconductor dies in the same or separate package bodies, with or without other electrical components. System level products may also include board level products ("BLP"), such as those having one or more semiconductor devices on one or more printed wiring boards. Box level products ("Boxes") are also system level products which may include a combination of SCMs, MCMs, BLPs, and/or other devices. One or more of such SCMs, MCMs, BLPs or Boxes may act as, or be integrated into, a functional system or subsystem or the like.

System level products can be employed to carry out numerous applications and in various environments. For example, system level products may include:

(a) computer systems comprising personal computers, work stations, servers, embedded logic controllers, digital data storage, minicomputers, mainframe computers and super computers;

(b) information and entertainment transmission systems comprising telecommunications, satellite, cable, cellular telephones, private branch exchange, telephone switching, and video picture telephones wherein the information may be digitally compressed and forward error corrected;

(c) entertainment systems comprising digital video and audio systems, such as digital analog tape and high definition television, playback devices, display and reproduction means, for example, televisions, cameras, recorders, compact disc players/recorders, digital tape players/recorders and the like;

(d) security and surveillance systems comprising home and business security intrusion, flood and fire systems; vehicle alarms;

(e) information, data acquisition and control systems comprising industrial plant sensors and control means, and control systems utilizing information from the sensors to actuate the control means; and

(f) transportation systems comprising airplanes, trains, automobiles, helicopters, rockets, missiles, boats and submarines, and the like, as well as subsystems utilized in the transportation systems, which include positioning systems (for example, global positioning systems), navigational displays and controllers, hazard avoidance systems (such as radar and sonar), fly by wire control systems and engine controlling and monitoring systems.

The above mentioned systems may also be combined to comprise larger and more complex systems that can be utilized to facilitate the infrastructure of a home, business, municipality, government entity, city wide community, state governance, world wide communications, information distribution and security.

In an SCM, a single semiconductor die is packaged and adapted for connection to external systems. This usually involves mounting the die to some sort of substrate, lead frame or carrier, connecting the bond pads on the die to some sort of conductive leads or traces and forming a package body around the die. The conductive leads or traces exit the package body, and usually terminate in external leads, pins or solder balls.

Referring to FIG. 10, a schematic elevational view of a SCM is illustrated in cross section. The SCM 1000, as illustrated, is a ball bump grid array semiconductor package. A semiconductor die 1002 is mounted to the top surface of a central area 1003 of a substrate 1004. The semiconductor die has conductive lines 1012 formed thereon (not illustrated). The top surface 1006 of the substrate 1004 is provided with a number of conductive traces 1008 that extend from near the periphery of the substrate 1004 to the central area 1003. The die 1002 has bond pads 1010 thereon. Bond wires 1014 extend from the bond pads 1010 to inner ends of the traces 1008. Near the periphery of the substrate 1004, there are plated (conductive) through-holes (vias) 1016 extending from the bottom surface 1018 of the substrate 1004, through the substrate to a respective trace 1008. The bottom surface 1018 of the substrate is provided with a number of conductive traces 1020, each having an end connected with a respective via 1016. In this manner, signals (and power) to and from the die are connected through the bond wires 1014, through the top side traces 1008, through the vias 1016, to the bottom side traces 1020. Solder balls 1024 are attached to the traces 1020. A package body 1026 is formed over the die 1002, and partially covers the top surface of the substrate 1004.

Pin grid array semiconductor packages, chip carriers (leaded or leadless), flat packs (such as plastic quad gullwing flat packs), ceramic packages and small outline integrated circuits are also examples of SCMs. Numerous other examples, designs and types of SCMs are known to those of ordinary skill in the art of semiconductor integrated circuit packages.

When two or more semiconductor dies are mounted in the same or separate package body, with or without other electrical components, the resulting assembly is typically referred to as a multi-chip module (MCM).

In order to connect to one of the two or more semiconductor dies of a MCK, a substrate having conductive traces (like substrate 1004 of FIG. 10) is often used. Additional components such as capacitors, resistors and inductors may be mounted to the substrate. Often, the interconnections between the various components mounted to the substrate necessitate a large number of conductive traces which need to cross one another. In such cases, it is known to provide a substrate, having alternating layers of insulating material (such as fiberglass, teflon, FR4, BT resin, and the like) and conductive trace patterns (typically formed of metal foils, such as copper). The conductive traces from one layer are typically connected to the conductive traces of another layer by plated through-holes or vias.

FIG. 11 illustrates a schematic perspective view of a MCM. MCM 1100 comprises a substrate 1106 having conductive lines formed thereon (not illustrated), at least two semiconductor dies 1102 and 1104 disposed on the substrate 1106 and electrically connected to conductive lines (not illustrated) of the substrate 1106 by the outer tips of lead frame leads 1108. The dies 1102 and 1104 may be physically mounted to the substrate 1106. The two semiconductor dies 1102 and 1104 are illustrated encapsulated, however, non-encapsulated flip-chip ball bump dies are also contemplated. One or more layers of conductive traces and plated through-holes (not illustrated) may be disposed within substrate 1 106 and are used to connect the semiconductor dies 1102 and 1104 to one another and to external connections 1110, such as the solder ball bump structures as described above. Additional electrical components, such as capacitors, resistors and inductors (not illustrated) may also be disposed on and connected to the substrate 1106. Numerous other examples, designs and types of MCMs are known to those of skill in the art of semiconductor packages.

A BLP typically includes one or more semiconductor devices (such as a single chip module and/or a multi-chip module), in addition to other components, on one or more printed wiring boards.

FIG. 12 illustrates a schematic top view of a board level product (BLP). The BLP 1200 comprises an array of SCMs 1000, a MCM 1100, and a memory component 1104. The SCMs 1000, the MCM 1100, and memory 1204 are each disposed on and connected to a printed wiring board 1202. The printed wiring board 1202 provides for all connections between those components. Examples of BLPs include central processing unit boards, memory boards, and interface boards (as are routinely utilized in computer systems).

Boxes are also system level products which may include a combination of SCMs, MCMs, BLPs, and/or other devices. For example, multiple board level products may be connected in parallel with one another by a bus (such as a back plane bus, which is also referred to as a mother board), which communicates signals therebetween. Numerous other examples, designs and types of Boxes are readily apparent to one of ordinary skill in the art. The conductive leads wires exit the boxes, and are usually terminated at external leads or pins.

FIG. 13 illustrates a schematic top view of a box level product. The box level product 1300 comprises at least one printed wiring board 1202 as described above, a power supply 1302 and an enclosure or box 1304 containing the at least one board 1202 and the power supply 1302. One or more box level products may be used to create more complex systems according to the present invention.

FIG. 14 illustrates a schematic block diagram of various computer systems interconnected together via various digital data transmission systems. A file server 1402 is connected to a digital data storage device 1404 such as, for example, magnetic hard disk, tape, optical disk, flash memory, core memory, semiconductor memory and the like. The server 1402 may be connected to at least one personal computer 1406, a work station 1408, a minicomputer 1410, a mainframe computer 1412, and a super computer 1414 through a number of digital data transmission system networks such as token ring, star, coaxial, fiber-optic and the like. These networks may utilize data protocols such as Scaleable Coherent Interface ("SCI"), ANSI/IEEE Std 1596-1992 SCI, Asynchronous Transfer Mode ("ATM"), FiberChannel, SerialBus, SCSI, SSA, QuickRing, HIPPI, FDDI, Ethernet and the like.

FIG. 15 is a schematic block diagram of an entertainment system according to the present invention. The entertainment system 1500 may be comprised of the following component subsystems: a high definition television (HDTV) 1502, a stereo 1504, a video cassette recorder (VCR) 1506, a television camera/recorder (Camcorder) 1508, a digital audio tape unit (DAT) 1510, a compact disk player (CD) 1512, a VHF/UHF tuner 1514, a direct broadcast satellite (DBS) decoder 1516, and a cable decoder 1518. These component subsystems are made up of SCM, MCM, BLP and boxes as disclosed above.

The DBS decoder 1516 receives a digitally encoded and forward error corrected signal from a dish antenna (not illustrated) which receives a DBS entertainment signal from a geosynchronous satellite (see FIG. 16). Hardwired cable is connected to the cable decoder 1518 which decodes and converts the cable entertainment channels to signals for viewing on the HDTV 1502 or a standard television (not illustrated). Standard broadcast television and stereo signals may be received by the VHF/UHF tuner 1514 and the base band signals made available to the HDTV 1502, stereo 1504 and the other recording devices (VCR 1506, DAT 1510). Similarly, recorded entertainment information may be played on the HDTV 1502 and stereo 1504 from the playback devices (DAT 1510, Camcorder 1508, CD 1512, VCR 1506) for viewing and listening enjoyment by the user.

FIG. 16 is a schematic block diagram of an information and entertainment communications system according to the present invention. The information and entertainment communications system 1600 is comprised of the following systems: A HDTV ground station 1602 which transmits a digitally encoded and forward error corrected signal from the HDTV studio 1604 by microwave dish 1606 to a DBS satellite 1608. The satellite 1608 rebroadcasts the signal from the studio 1604 to a plurality of ground station dish antennas 1610 which are connected to corresponding HDTV receivers/decoders 1612 where the DBS satellite signal is processed and made available, for example, to the entertainment system 1500. The system 1600 is comprised of many SCM, MCM, BLP and box level subsystems which greatly benefit from the features, aspects and advantages of the present invention. Some of these subsystems are a digital audio and video formatting subsystem 1614 which convert the analog entertainment information into a digital format, and a digital compression and forward error connection subsystem 1616 which prepares the digitally encoded entertainment information for transmission by the ground station 1602 to the satellite 1608.

FIG. 17 is a schematic block diagram of a security and surveillance system according to the present invention. The security and surveillance system 1700 is comprised of the following subsystems: A television camera 1702, intrusion detection sensors 1704, a sensor alarm panel 1706, and a television monitor 1708. The television monitor 1708 displays what the television camera(s) 1702 observe. The alarm panel 1706 displays the status of the sensors 1704 and will annunciate an alert upon a sensed alarm condition. The system 1700 may be utilized in homes, businesses, government building, military bases, prisons and any area requiring security and surveillance.

In addition, another embodiment of the security and surveillance system 1700 may be utilized to monitor operating conditions of transportation systems such as engine status, hull integrity, operating temperatures, maintenance evaluation and other parameters deemed necessary for the safe and efficient operation of the transportation systems (see FIG. 19). In a further embodiment of subsystems for the transportation systems, positioning and navigational (GPS) systems may be utilized for hazard avoidance, as well as radar and sonar (see FIG. 19). Further, operation of the transportation systems may be implemented by digital control, such as "fly-by-wire," along with the monitoring thereof The system 1700 and its subsystems may be utilized with the other system embodiments disclosed herein and will greatly benefit from the features, aspects and advantages of invention as disclosed hereinabove.

FIG. 18 is a schematic block diagram of a plurality of transportation systems according to the present invention. The transportation systems, generally referenced to by the numeral 1800, may utilize, individually or in combination, the aforementioned systems to great advantage. Embodiments of the transportation system 1800 is as follows: An airplane 1802, a helicopter 1804, a train 1806, a vehicle 1808 such as an automobile or truck, a rocket 1810, a space shuttle 1812, a ship 1814, a submarine 1816, and the like. Each of the embodiments of the transportation systems 1800 contemplated herein may greatly benefit from the communications, navigation and control systems disclosed herein along with he features, aspects and advantages of the present invention.

Each of the embodiments of the transportation systems 1800 may utilize a positioning and navigation system which derives its position information from a global positioning satellite system (GPS) 1818. The positioning and navigation system is comprised of SCM, MCM, BLP and box level systems as discussed hereinabove. Radar 1820 and/or sonar 1822 systems may be utilized for collusion avoidance and location and may be incorporated with any of the transportation systems 1800.

FIG. 19 is a schematic block diagram of a plurality of communications and information transmission systems according to the present invention. The communications and information transmission systems 1900 may comprise, individually or in combination, a telephone exchange 1902, a PBX 1904, a voice mail system 1906, telephones 1908, a video teleconferencing system 1910, a video picture telephone 1912 and the like. The systems 1900 may also comprise a cellular telephone 1914, and a plurality of cell sites 1916 which may be connected with the telephone system 1902. Further, systems 1900 may be computers 1918 connected together through the internet system 1920. Both analog and digital communications are contemplated herein with the various features, advantages and aspects of the present invention.

Other MCM, SCM, mini-board, micro-board, board level and other system subassemblies are contemplated using the bond wire support structure of the present invention. Additionally, such sub-assemblies or packages using such support structures in the integrated circuits used with traditional circuit boards or sub-assemblies for a system level product. Examples of electronic systems that may benefit from the system and method of the present invention have been mentioned above. The spirit and intent of the present invention is to improve the reliability and reduce the costs for all electronic systems from a single semiconductor integrated circuit die to a complex multiple box electronic system.

The present invention, therefore, is well adapted to carry out the objects and attain the ends and advantages mentioned, as well as others inherent therein. While presently preferred embodiments of the invention and various aspects thereto have been given for purposes of disclosure, numerous changes in the details of construction, interconnection and arrangement of parts will readily suggest themselves to those skilled in the art and which are encompassed within the spirit of the invention and the scope of the appended claims.

While the present invention has been depicted, described, and is defined by reference to particularly preferred embodiments of the invention, such references do not imply a limitation on the invention, and no such limitation is to be inferred. The invention is capable of considerable modification, alternation, and equivalents in form and function, as will occur to those ordinarily skilled in the pertinent arts. The depicted and described preferred embodiments of the invention are exemplary only, and are not exhaustive of the scope of the invention. Consequently, the invention is intended to be limited only by the spirit and scope of the appended claims, giving full cognizance to equivalents in all respects. 

What is claimed is:
 1. An electronic system utilizing at least one integrated circuit package, comprising:a semiconductor die having outer edges defining a first shape, and bond wire attachment points disposed on a surface of the die along the edges thereof; an integrated circuit package with a die-receiving area having outer edges defining a second shape substantially different from the first shape, and conductive leads of the package extending inward towards the die-receiving area; wherein a difference between the first and second shapes causes bond wire paths between the bond wire attachment points on the die and corresponding inner ends of the conductive lead to be non-uniform in length and varying in a graduated manner from a minimum length to a maximum length; a jumper structure having jumper traces in the die-receiving area, each jumper trace substantially aligned with a corresponding bond wire path and varying in length in a graduated fashion corresponding to the graduated variation in length of the bond wire paths; one or more first bond wires such that each first bond wire connects between an inner end of a conductive lead to an outer end of a corresponding jumper trace; and one or more second bond wires such that each second bond wire connects between an inner end of a corresponding jumper trace to a corresponding bond wire attachment point on the die.
 2. The system of claim 1, wherein the lengths of the jumper traces are sized so that for each bond wire path, the total length of a first and second bond wire is substantially equal to the total length of other first and second bond wires.
 3. The system of claim 1, wherein cross-sections of the jumper traces are established to provide substantially equal resistance values for each of the jumper traces.
 4. The system of claim 1, wherein the electronic system is a single chip module.
 5. The system of claim 1, wherein the electronic system is a multi-chip module having at least one semiconductor device.
 6. The system of claim 1, wherein the electronic system is a board level product having a plurality of semiconductor devices on at least one printed wiring board.
 7. The system of claim 1, wherein the electronic system is a box level system having a plurality of semiconductor devices on at least one printed wiring board mounted into a box with a power source.
 8. The system of claim 1, wherein the electronic system is a computer system.
 9. The system of claim 1, wherein the electronic system is an information and entertainment transmission system.
 10. The system of claim 1, wherein the electronic system is an entertainment system.
 11. The system of claim 1, wherein the electronic system is a security and surveillance system.
 12. The system of claim 1, wherein the electronic system is an information, data acquisition and control system.
 13. The system of claim 1, wherein the electronic system is utilized in a transportation system. 